Title:  Computationally-Enhanced Non-Isolated High Voltage Point-of-Load DC-DC Converters for High Performance Computing

Committee:

Dr. Arijit Raychowdhury, ECE, Chair, Advisor

Dr. , Co-Advisor

Dr. Saibal Mukhopadhyay, ECE

Dr. Shaolan Li, ECE

Dr. Muhannad Bakir, ECE

Dr. Xin Zhang, Columbia

Abstract: High voltage power bus (48 V) is replacing conventional 12 V power bus in many systems such as data centers and auto-motives. Therefore, high voltage point-of-load (POL) DC-DC converters (48-to-1 V) are essential in future systems. This research explores the design of high-efficiency high-density non-isolated high voltage POL converters. Compared to prior works, computational methods are implemented to optimize converter's performance. First, a simulation framework and a design space exploration are provided, which reduces the design complexity and enables proposed computation-assisted design methodology. Next, a Gallium Nitride (GaN) based reconfigurable and digital programmable hybrid converter is presented, which supports wide range of input voltage, output voltage and output current. With fine controlled zero voltage switching, this work improves light load efficiency and achieves wide range of operation. Third, a self-optimized hybrid converter is presented, which has a gradient descent run-time optimization. It can optimize its parameters such as switching frequency during the operation to maximize the efficiency. The proposed topology also reduces required number of capacitors for improved power density. Next, a hybrid converter design with low profile inductors and fully on-chip bootstrapping circuits for extreme high current density is presented. By reducing currents on inductors, it avoids bulky inductors while maintains high efficiency and high output current. New bootstrapping circuits are proposed to enable on-chip bootstrapping capacitors. Finally, conclusions are given for high voltage POL converter designs and future research directions are discussed.